PERSONNEL FILE / 01
Hunter Stuart
Communication engineering / Hardware, algorithms, systems
Undergraduate in Communication Engineering at UESTC. I have built things across backend, embedded hardware and array signal processing, and I like taking a complex system apart into modules before wiring the whole chain back together.
Education
01- Sep 2024 — nowBSc · Communication Engineering, UESTC
Coursework: Signals and Systems, Digital Signal Processing, Digital Logic and Processor Systems, Circuit Analysis and Electronics, Electromagnetics and Waves, Data Structures, Software Design, Space-Ground Integrated Communication Systems (honours research track).
Projects
04- Apr 2026 — Aug 2026Tracked six-axis arm with environmental sensing · national 1st prize, application track
A whole-system build: tracked chassis, six-axis arm, VR teleoperation and an AI safety assessment. Owned the environmental sensing board — ESP32-S3 with MQ-7 / MQ-4 / AO-03 gas sensors, SPS30 particulates and AHT20+BMP280 temperature, humidity and pressure; calibrated the dividers and ADC inputs, packed a fixed 22-byte frame and published it over both I2C-slave (0x31) and WiFi UDP. On the arm side, inverse kinematics and multi-node CAN motor scheduling on STM32H743. The VR client fused environment, chassis and joint streams, asked a large model for a safety grade and rendered it into the HUD.
- Sep 2025 — Jan 2026Satellite communication simulator · solo developer
A Python + PyQt desktop tool covering data parsing, orbit propagation and 3D visualisation. Implemented classical six-orbital-element propagation from scratch, with arbitrary-epoch prediction and time-scrubbing replay; exported sub-satellite tracks, visibility windows and telemetry files.
- Nov 2025 — Dec 2025Dual-channel sEMG control system · architecture
Led the analog front end for surface EMG: weak-signal amplification, band-pass filtering and mains notch. STM32 firmware for synchronised dual-channel sampling and streaming; host-side digital filtering, FFT and power-spectrum analysis. Wrote the web UI that wired the control logic into a game, closing the biosignal-to-interface loop.
- Oct 2025 — Dec 2025MVDR localisation and directional pickup · FPGA, national 2nd prize
Engineered MVDR beamforming (steering vectors, covariance estimation, weight updates) with dynamic updates for changing acoustics. Designed and fabbed the array and core-board PCBs; aligned multi-channel PDM audio and designed anti-aliasing filters to keep phase coherence. Achieved 10 m pickup range and 10° bearing resolution.
Skills
08- PythonData handling & desktop apps
Python carries both the satellite simulator and the sEMG host tool: PyQt for the UI, NumPy for the maths, scripts for batch data.
- CSTM32 firmware
Synchronised dual-channel ADC sampling over DMA, UART and timer peripheral drivers, real-time streaming, key and interrupt handling.
- VerilogFPGA logic
Multi-channel PDM audio alignment and digital anti-aliasing filters, with Vivado timing constraints and on-board bring-up.
- AnalogAnalog front ends
Design and debug of weak-signal amplification, band-pass filtering and mains notch; traced stage by stage with scope and signal generator.
- PCBBoard design
Schematics, layout and routing, fabrication and bring-up for array and core boards.
- AlgorithmsArray & orbit algorithms
MVDR beamforming (steering vectors, covariance estimation, weight updates), FFT and power spectra, six-element orbit propagation.
- WebFront end & visualisation
TypeScript / Astro / React for data interfaces; this site is hand-written with no UI framework.
- ToolingEveryday tools
Git, Linux / Shell, Keil and STM32CubeMX, Vivado, PyQt, LaTeX.
Corrections, suggestions, or just hello — email works.